<![CDATA[The way to enhance clock line driving ability with Multi SPI slaves in Circuit]]>To avoid Clock line always keep low when there are several SPI salves with the one Master, User could add Low voltage CMOS HEX buffer to enhance clock driving ability, use 74LCX07 for instance.

]]>https://forum.aceinna.com//topic/97/the-way-to-enhance-clock-line-driving-ability-with-multi-spi-slaves-in-circuitRSS for NodeSun, 14 Jun 2026 16:24:46 GMTTue, 29 Oct 2019 00:58:20 GMT60<![CDATA[Reply to The way to enhance clock line driving ability with Multi SPI slaves in Circuit on Tue, 29 Oct 2019 00:58:20 GMT]]>To avoid Clock line always keep low when there are several SPI salves with the one Master, User could add Low voltage CMOS HEX buffer to enhance clock driving ability, use 74LCX07 for instance.

]]>https://forum.aceinna.com//post/375https://forum.aceinna.com//post/375Tue, 29 Oct 2019 00:58:20 GMT